Frequency synthesizer for on-chip testing and automated tuning Conference Paper uri icon


  • This paper presents a compact, phase-locked loop (PLL) based, frequency synthesizer suitable for built-in testing and automatic tuning applications operating in the 100MHz frequency range. Key features of this design include a differential charge pump with common mode feedback (CMFB) and a voltage controlled oscillator (VCO) based on a pseudo-differential OTA with a linear transconductance control and tuning invariant output resistance. Experimental results from an integrated prototype fabricated using standard 0.35μm CMOS technology are presented. The measured HD3 of the output signal is better than -39dB over 80% of the tuning range: 40-160MHz. The circuit occupies a silicon area of 200×1000μm2and operates from a 3.3V power supply.

author list (cited authors)

  • Valero-Lopez, A. Y., Valdes-Garcia, A., Sanchez-Sinencio, E., & IEEE, ..

complete list of authors

  • Valero-Lopez, AY||Valdes-Garcia, A||Sanchez-Sinencio, E

publication date

  • September 2004