Fast timing recovery for linearly and nonlinearly modulated systems Academic Article

abstract

• Digital phase lock loops (PLLs) are often used in timing acquisition systems. It is known that some non-data-aided timing error detectors occasionally cause hangup problems in digital PLLs. In this paper, we introduce a novel two step antihangup timing recovery scheme. Through intensive simulations, we show that this enhanced scheme greatly reduces the probability of hangup, and speeds up the timing recovery process for both linearly and nonlinearly modulated systems. 2005 IEEE.

authors

• Serpedin, Erchin

published proceedings

• IEEE TRANSACTIONS ON VEHICULAR TECHNOLOGY

author list (cited authors)

• Shi, K., & Serpedin, E.

citation count

• 3

complete list of authors

• Shi, K||Serpedin, E

publication date

• November 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Vehicular Technology  Journal

keywords

• Digital Phase Lockloop (pll)
• Fast Acquisition
• Feedback
• Hangup
• Linear Modulations
• Nonlinear Modulations
• Timing Error Detector
• Timing Recovery

Digital Object Identifier (DOI)

• 10.1109/TVT.2005.853478

start page

• 2017

end page

• 2023

volume

• 54

issue

• 6

URL

• http://dx.doi.org/10.1109/tvt.2005.853478