Improved Hopfield Network Optimization Using Manufacturable Three-Terminal Electronic Synapses Academic Article

authors

• Williams, R. Stanley
• Yi, Suin

published proceedings

• IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS

author list (cited authors)

• Yi, S., Kumar, S., & Williams, R. S.

citation count

• 4

complete list of authors

• Yi, Su-In||Kumar, Suhas||Williams, R Stanley

publication date

• October 2021

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Circuits and Systems Part 1: Regular Papers  Journal

keywords

• Computational Modeling
• Hopfield Network
• Integrated Circuit Modeling
• Logic Gates
• Neural Network
• Optimization
• Silicon
• Sonos Devices
• Synapses
• Three-terminal Synaptic Device
• Transient Chaos

Digital Object Identifier (DOI)

• 10.1109/TCSI.2021.3119648

start page

• 4970

end page

• 4978

volume

• 68

issue

• 12