A Defect-Tolerant Computer Architecture: Opportunities for Nanotechnology Academic Article uri icon

abstract

  • Teramac is a massively parallel experimental computer built at Hewlett-Packard Laboratories to investigate a wide range of different computational architectures. This machine contains about 220,000 hardware defects, any one of which could prove fatal to a conventional computer, and yet it operated 100 times faster than a high-end single-processor workstation for some of its configurations. The defect-tolerant architecture of Teramac, which incorporates a high communication bandwith that enables it to easily route around defects, has significant implications for any future nanometer-scale computational paradigm. It may be feasible to chemically synthesize individual electronic components with less than a 100 percent yield, assemble them into systems with appreciable uncertainty in their connectivity, and still create a powerful and reliable data communications network. Future nanoscale computers may consist of extremely large-configuration memories that are programmed for specific tasks by a tutor that locates and tags the defects in the system.

published proceedings

  • Science

altmetric score

  • 9.5

author list (cited authors)

  • Heath, J. R., Kuekes, P. J., Snider, G. S., & Williams, R. S.

citation count

  • 730

complete list of authors

  • Heath, James R||Kuekes, Philip J||Snider, Gregory S||Williams, R Stanley

publication date

  • June 1998