Blocker-Tolerant Wideband Continuous-Time Delta Sigma ADC Using Embedded Minimally-Invasive Filtering
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abstract
Continuous-time delta sigma ADCs are one of the highly sought-after ADC architectures in modern-day wideband wireless applications. In a wireless system, the ADCs have to digitize the desired signals in the presence of large blockers. We propose a technique to improve the blocker-tolerance of continuous-time delta sigma ADCs by embedding a third-order minimally-invasive filter in the delta sigma loop. The NTF is restored by re-using the same filter network, eliminating the need for a matched filter. We present detailed system-level analysis and design choices. We also present simulation results of the proposed technique on a 170 MHz BW, 11-bit ENOB, 4th-order cascaded-integrator-feed-forward (CIFF) loop-filter based delta sigma ADC. The loop filter, and DACs are implemented at the schematic level in a 40 nm CMOS technology. Simulation results show that a robust performance towards the blockers is achieved in our design. A reduction of around 27 dB in the STF gain is achieved at the frequency where the ADC's STF peaked before embedding the filter. The passband edge droop in the STF is less than 0.25 dB, and there is only around 1 dB peaking in the STF. Simulation results also confirm that the embedded filtering and NTF restoration did not sacrifice the ADC's in-band performance.
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2020 IEEE 63rd International Midwest Symposium on Circuits and Systems (MWSCAS)
