A wideband CMOS distributed amplifier with slow-wave shielded transmission lines Academic Article uri icon

abstract

  • A four-stage distributed amplifier utilizing low-loss slow-wave shielded (SWS) transmission lines is implemented in a standard 0.13m Complementary Metal-Oxide-Semiconductor (CMOS) technology. The amplifier when biased in its high current operating mode of IDtotal=46mA (at Vdd=2.2 V, Pdiss=101mW) provides a forward transmission gain of 11.31.5dB with a 3-dB bandwidth of 17GHz and a gain-bandwidth product of 74GHz. The noise figure (NF) under the same bias condition is better than 8.5dB up to 10GHz. The measured output-referred 1-dB compression point is higher than +2dBm. The amplifier is also measured under low-bias condition of IDtotal=18mA (at Vdd=1.15V, Pdiss=20.7mW). It provides a transmission gain of 6.61dB, a 3-dB bandwidth of 14.8GHz, a gain-bandwidth product of 35.5GHz, and a NF of better than 8.6dB up to 10GHz. Despite using a simple four-stage cascode design, this distributed amplifier achieves very high-gain-bandwidth product at a relatively low DC power compared to the state of the art CMOS distributed amplifiers reported in the literature. This is due to the incorporation of low-loss SWS coplanar waveguide (CPW) transmission lines with a loss factor of nearly 50% of that of standard transmission lines on CMOS-grade Si substrate.

published proceedings

  • INTERNATIONAL JOURNAL OF MICROWAVE AND WIRELESS TECHNOLOGIES

author list (cited authors)

  • Lahiji, R. R., Katehi, L., & Mohammadi, S.

citation count

  • 2

complete list of authors

  • Lahiji, Rosa R||Katehi, Linda PB||Mohammadi, Saeed

publication date

  • February 2011