High Yield Reduced Process Tolerance Self-Aligned Double Mesa Process Technology for SiGe Power HBTs Conference Paper uri icon

abstract

  • Two novel high yield reduced process tolerance process technologies were developed for double mesa SiGe power HBT. DC and RF results from both 10 and 20 finger devices were presented. A reduced tolerance process is essential in the further development of MMICs using these transistors.

name of conference

  • 2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)

published proceedings

  • 2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)

author list (cited authors)

  • Kok-Yan Lee, .., Johnson, B. N., Mohantmadi, S., Bhattacharya, P. K., & Katehi, L.

citation count

  • 0

complete list of authors

  • Johnson, BN||Mohantmadi, S||Bhattacharya, PK||Katehi, LPB

publication date

  • January 2004

publisher