Low loss multi-wafer vertical interconnects for three dimensional integrated circuits

A low loss multi-wafer vertical interconnect appropriate for a microstrip-based circuit architecture is proposed. This transition has been designed, fabricated and measured on 100 /spl mu/m thick GaAs substrates. The measurements demonstrate insertion loss of better than 0.2dB and reflection of better than 13.6dB up to 20GHz. Using such a high performance transition allows for a more power efficient interconnect, while it enables denser packaging by stacking the substrates on top of each other, as today's technologies demand.

Low loss multi-wafer vertical interconnects for three dimensional integrated circuits Conference Paper