Heterogeneous Wafer-Scale Circuit Architectures
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This article has presented circuit architectures that allow for the 3D integration and on-wafer packaging through the concept of an Si interposer. The presented 3D integration schemes have allowed for the design and fabrication of a fully integrated receiver that performs at 10 GHz. High-Q passives and 3D interconnects allow for the design of low-cost, high-density circuits that also exhibit very high performance
author list (cited authors)
Katehi, L., Chappell, W., Mohammadi, S., Margomenos, A., & Steer, M.