Leveraging Unused Cache Block Words to Reduce Power in CMP Interconnect Academic Article

abstract

• Power is of paramount importance in modern computer system design. In particular, the cache interconnect in future CMP designs is projected to consume up to half of the system power for cache fills and spills. Despite the power consumed by spills and fills, a significant percentage of each cache line is unused prior to eviction from the cache. If unused cache block words can be identified, this information can be used to improve CMP interconnect power and energy consumption. We propose a new method of CMP interconnect packet composition, leveraging unused data to reduce power. These methods are well suited to interconnection networks with high-bandwidth wires, and do not require expensive multi-ported memory systems. Assuming perfect prediction, our technique achieves an average of 37 savings in total dynamic link power consumption. With our current best prediction mechanism, our techniques reduce dynamic power consumption by 23 on average. 2006 IEEE.

authors

• Gratz, Paul

published proceedings

• IEEE COMPUTER ARCHITECTURE LETTERS

author list (cited authors)

• Kim, H., & Gratz, P. V.

citation count

• 3

complete list of authors

• Kim, Hyungjun||Gratz, Paul V

publication date

• January 2010

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Computer Architecture Letters  Journal

keywords

• Dynamic Power
• Flit Encoding
• Memory System
• Multicore
• Noc

Digital Object Identifier (DOI)

• 10.1109/L-CA.2010.9

start page

• 33

end page

• 36

volume

• 9

issue

• 1

URL

• http://dx.doi.org/10.1109/l-ca.2010.9