A 12-Bit 125-MS/s 2.5-Bit/Cycle SAR-Based Pipeline ADC Employing a Self-Biased Gain Boosting Amplifier
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Overview
published proceedings
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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS
author list (cited authors)
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Park, C., Chen, T., Noh, K., Zhou, D., Prakash, S., Alizadeh, M. N., ... Silva-Martinez, J.
citation count
complete list of authors
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Park, Chulhyun||Chen, Tao||Noh, Kyoohyun||Zhou, Dadian||Prakash, Suraj||Alizadeh, Mohammadhossein Naderi||Karsilayan, Aydin I||Chen, Degang||Geiger, Randall L||Silva-Martinez, Jose
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Research
keywords
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A
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Analog-to-digital Converters (adcs)
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Boosting
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Calibration
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Capacitors
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Clocks
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Computer Architecture
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D
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Gain
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Linearization
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Low-power Amplifier
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Open-loop Residue Amplifier
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Pipeline Adc
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Pipelines
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STABILITY
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Self-bias Impedance Boosting
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Single-stage Amplifier
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Successive Approximation Register (sar)
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Transimpedance Amplifier
Identity
Digital Object Identifier (DOI)
Additional Document Info
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volume
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URL
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http://dx.doi.org/10.1109/tcsi.2020.3006149