Fully associative cache partitioning with don't care bits for real-time applications Academic Article uri icon


  • The usage of cache memories in time-critical applications has been limited as caches introduce unpredictable execution behavior. Cache partitioning techniques have been developed to reduce the impact of unpredictability owing to context switch effects. However, partitioning reduces the cache size available for each task resulting in capacity related cache misses. This paper introduces a fully associative cache architecture for multi-tasking applications where effective partition sizes are increased by tag compression in the cache. The proposed scheme uses a few don't care cells in its least significant bits of the tag to aggregate multiple tag entries into a single entry. The experimental results indicate that the proposed scheme is context switch resilient when eight different real-time benchmarks use the cache concurrently. Further, this cache architecture requires less time and less energy to perform tag table search compared to contemporary fully associative caches of the same size.

published proceedings

  • ACM SIGBED Review

author list (cited authors)

  • Chousein, A., & Mahapatra, R. N.

citation count

  • 5

complete list of authors

  • Chousein, Ali||Mahapatra, Rabi N

publication date

  • April 2005