Investigation of On-Chip Phase-Noise Reduction Using Self-Injection Technique on Fully Integrated Frequency Dividers Conference Paper

abstract

• Significant phase-noise improvement is demonstrated using a self-injection technique on a fully integrated 0.18-m CMOS divide-by-3 (1/3) injection-locked frequency divider (ILFD). The self-injection is realized with an odd-to-even harmonic converter followed by a feedback-amplifier. The self-injection 1/3 ILFD shows superior injection efficiency due to the increased self-injection signal which results in substantial phase noise reduction. The phase noise is improved by 14.77 dB at 1-MHz offset when the self-injection loop is enabled. The core of the 1/3 ILFD occupies 0.048-mm2 area and dissipates 18.2-mW from a 1.8-V power supply. The phase-noise reduction technique can be implemented for other kinds of ILFDs. 2012 IEEE.

name of conference

• 2012 Asia Pacific Microwave Conference Proceedings

authors

• Nguyen, Cam Van

published proceedings

• 2012 ASIA-PACIFIC MICROWAVE CONFERENCE (APMC 2012)

author list (cited authors)

• Lee, S., Kim, J., & Cam, N.

citation count

• 1

complete list of authors

• Lee, Sanghun||Kim, Jusung||Cam, Nguyen

publication date

• December 2012

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

keywords

• Injection-locked Frequency Divider
• Phase Noise
• Pll
• Rfic
• Synthesizer

Digital Object Identifier (DOI)

• 10.1109/apmc.2012.6421693

International Standard Book Number (ISBN) 13

• 978-1-4577-1331-6

start page

• 655

end page

• 657

URL

• http://dx.doi.org/10.1109/apmc.2012.6421693