Surface Stress Evolution in Through Silicon Via Wafer During a Backside Thinning Process
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Overview
published proceedings
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IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING
author list (cited authors)
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Jiang, B., Chen, Y., Fang, A., Liu, B., Liu, Y., Liang, H., & Lu, X.
citation count
complete list of authors
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Jiang, Bocheng||Chen, Yan||Fang, Alex||Liu, Bingtong||Liu, Yuhong||Liang, Hong||Lu, Xinchun
publication date
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published in
Research
keywords
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Chemical Mechanical Polishing
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Lapping
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Residual Stresses
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Silicon
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Surface Cracks
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Surface Stress
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Surface Treatment
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Through Silicon Via
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Through-silicon Vias
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Wafer Backside Thinning
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Digital Object Identifier (DOI)
Additional Document Info
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URL
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http://dx.doi.org/10.1109/tsm.2019.2937004