A 32-bit PowerPC system-on-a-chip with support for dynamic voltage scaling and dynamic frequency scaling Academic Article uri icon

abstract

  • A PowerPC system-on-a-chip processor which makes use of dynamic voltage scaling and on-the-fly frequency scaling to adapt to the dynamically changing performance demands and power consumption constraints of high-content, battery powered applications is described. The PowerPC core and caches achieve frequencies as high as 380 MHz at a supply of 1.8 V and active power consumption as low as 53 mW at a supply of 1.0 V. The system executes up to 500 DMIPS and can achieve standby power as low as 54 W. Logic supply changes as fast as 10 mV/ s are supported. A low-voltage PLL supplied by an on-chip regulator, which isolates the clock generator from the variable logic supply, allows the SOC to operate continuously while the logic supply voltage is modified. Hardware accelerators for speech recognition, instruction-stream decompression and cryptography are included in the SOC. The SOC occupies 36 mm2 in a 0.18 m, 1.8 V nominal-supply, bulk CMOS process.

published proceedings

  • IEEE JOURNAL OF SOLID-STATE CIRCUITS

altmetric score

  • 3

author list (cited authors)

  • Nowka, K. J., Carpenter, G. D., MacDonald, E. W., Ngo, H. C., Brock, B. C., Ishii, K. I., Nguyen, T. Y., & Burns, J. L.

citation count

  • 155

complete list of authors

  • Nowka, KJ||Carpenter, GD||MacDonald, EW||Ngo, HC||Brock, BC||Ishii, KI||Nguyen, TY||Burns, JL

publication date

  • November 2002