A low-overhead virtual rail technique for SRAM leakage power reduction Conference Paper uri icon

abstract

  • We propose a virtual supply rail control technique that reduces SRAM leakage. This method encompasses a cell-based image, serial tiling, pitch matching, small drive device overhead, and controlled power-on currents while incurring small circuit overhead. A virtual rail cell contains both the sleep transistor fingers and input/output drive transistors. The usual overhead associated with the drive circuit that controls the sleep transistors is significantly reduced due to reduced wire load and improved drive efficiency. This technique provides gradual power-on characteristics and good signal slews while effectively mitigating leakage current, maintaining read/write speed and achieving power-on latency compatible with high-performance designs. 2005 IEEE.

name of conference

  • 2005 International Conference on Computer Design

published proceedings

  • 2005 IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS & PROCESSORS, PROCEEDINGS

author list (cited authors)

  • Kuang, J. B., Ngo, H. C., Nowka, K. J., Law, J. C., & Joshi, R. V.

citation count

  • 4

complete list of authors

  • Kuang, JB||Ngo, HC||Nowka, KJ||Law, JC||Joshi, RV

publication date

  • January 2005