Leading zero anticipation and detection - A comparison of methods Conference Paper

abstract

• Design of the leading zero anticipator (LZA) or detector (LZD) is pivotal to the normalization of results for addition and fused multiplication-addition in high-performance floating point processors. This paper formalizes the analysis and describes some alternative organizations and implementations from the known art. It shows how choices made in the design are often dependent on the overall design of the addition unit, on how subtraction is handled when the exponents are the same, and on how it detects and corrects for the possible one-bit error of the LZA.

name of conference

• Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001

authors

• Nowka, Kevin

published proceedings

• ARITH-15 2001: 15TH SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS

altmetric score

• 3

author list (cited authors)

• Schmookler, M. S., & Nowka, K. J.

citation count

• 84

complete list of authors

• Schmookler, MS||Nowka, KJ

publication date

• January 2001

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• ARITH-15 2001: 15TH SYMPOSIUM ON COMPUTER ARITHMETIC, PROCEEDINGS  Journal

keywords

• 33 Built Environment And Design
• 3303 Design
• 46 Information And Computing Sciences
• Prevention

Digital Object Identifier (DOI)

• 10.1109/ARITH.2001.930098

International Standard Book Number (ISBN) 10

• 0-7695-1150-3

start page

• 7

end page

• 12

URL

• http://dx.doi.org/10.1109/arith.2001.930098