Gate adjusted resonant tunnel diode device and method of manufacture Patent uri icon

abstract

  • A gated resonant tunneling diode has a semiconductor mesa formed on a semiconductor substrate, a tunneling barrier layer between the mesa and the substrate, and a gate layered over the substrate about the mesa and aligned in close proximity to the tunneling barrier layer. A control voltage on the gate laterally constricts a potential well in the tunneling barrier to control the electrical size of a channel within which tunnelling occurs across the tunneling barrier layer. Preferably the gate and the tunneling layer are disposed at the base of the mesa, and the gate makes a rectifying Schottky junction in connection with the tunneling barrier layer. The device is constructed using an anisotropic etch to form the mesa with an undercut wall and a top portion overhanging the undercut wall, and a nonconformal deposition of gate material to align the gate with the top portion of the mesa.

author list (cited authors)

  • Weichold, M. H., Kinard, W. B., & Kirk, W. P.

complete list of authors

  • Weichold, Mark H||Kinard, William B||Kirk, Wiley P

publication date

  • March 1992