Managing the bottlenecks of a parallel Gauss-Seidel algorithm for power flow analysis Conference Paper uri icon


  • © 1993 IEEE. In our earlier papers, the parallelization and implementations of Gauss-Seidel (G-S) algorrthms for power flow analysis have been investigated on a Sequent flnlnnce ahared memory (SM) machine. In this paper, we generalize the idea to more genernl computer architectures and demonstrate how to eflectiuely increase the speedup upper bounds of G-S algorithms by properly managing the bottlenecks.

author list (cited authors)

  • Huang, G., & Ongsakul, W.

citation count

  • 3

publication date

  • January 1993