Regaining Trust in VLSI Design: Design-for-Trust Techniques Academic Article

abstract

• Designers use third-party intellectual property (IP) cores and outsource various steps in their integrated circuit (IC) design flow, including fabrication. As a result, security vulnerabilities have been emerging, forcing IC designers and end-users to reevaluate their trust in hardware. If an attacker gets hold of an unprotected design, attacks such as reverse engineering, insertion of malicious circuits, and IP piracy are possible. In this paper, we shed light on the vulnerabilities in very large scale integration (VLSI) design and fabrication flow, and survey design-for-trust (DfTr) techniques that aim at regaining trust in IC design. We elaborate on four DfTr techniques: logic encryption, split manufacturing, IC camouflaging, and Trojan activation. These techniques have been developed by reusing VLSI test principles. 1963-2012 IEEE.

authors

• Rajendran, Jeyavijayan

published proceedings

• Proceedings of the IEEE

altmetric score

• 9

author list (cited authors)

• Rajendran, J., Sinanoglu, O., & Karri, R.

citation count

• 66

complete list of authors

• Rajendran, Jeyavijayan||Sinanoglu, Ozgur||Karri, Ramesh

publication date

• August 2014

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings of the Institute of Electrical and Electronics Engineers (IEEE)  Journal

keywords

• 40 Engineering
• 4008 Electrical Engineering
• 4009 Electronics, Sensors And Digital Hardware

Digital Object Identifier (DOI)

• 10.1109/jproc.2014.2332154

start page

• 1266

end page

• 1282

volume

• 102

issue

• 8

URL

• http://dx.doi.org/10.1109/jproc.2014.2332154