Formal Security Verification of Third Party Intellectual Property Cores for Information Leakage
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abstract
2016 IEEE. Globalization of the system-on-chip (SoC) design flow has created opportunities for rogue intellectual property (IP) vendors to insert malicious circuits (a.k.a. hardware Trojans) into their IPs. We propose to formally verify third party IPs (3PIPs) for unauthorized information leakage. We validate our technique using Trojan benchmarks from the Trust-Hub.
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2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID)