An Overview of Hardware Intellectual Property Protection Conference Paper

abstract

• 2017 IEEE. Over the last fifteen years, a plethora of techniques has been developed to protect the hardware from piracy attacks from different sets of attackers in the supply chain - untrusted foundry, untrusted user, untrusted testing facility, or a combination thereof. This article explains their threat model(s), capabilities, and limitations. It also highlights several approaches that are developed to incorporate these techniques in conventional logic designs. Finally, the article explains provably-secure IP protection techniques and outline the challenges involved in making those technique practical.

name of conference

• 2017 IEEE International Symposium on Circuits and Systems (ISCAS)

authors

• Rajendran, Jeyavijayan

published proceedings

• 2017 IEEE International Symposium on Circuits and Systems (ISCAS)

author list (cited authors)

• Rajendran, J.

citation count

• 2

complete list of authors

• Rajendran, Jeyavijayan

publication date

• January 2017

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE International Symposium on Circuits and Systems  Journal

Digital Object Identifier (DOI)

• 10.1109/iscas.2017.8050883

International Standard Book Number (ISBN) 13

• 9781467368520

start page

• 1

end page

• 4

URL

• http://dx.doi.org/10.1109/iscas.2017.8050883