Logic synthesis Chapter uri icon

abstract

  • 2006 by Taylor and Francis Group, LLC. The roots of logic synthesis can be traced to the treatment of logic by George Boole (1815 to 1865), in what is now termed Boolean algebra. Shannons [1] discovery in 1938 showed that two-valued Boolean algebra can describe the operation of switching circuits. In the early days, logic design involved manipulating the truth table representations as Karnaugh maps [2,3]. The Karnaugh map-based minimization of logic is guided by a set of rules on how entries in the maps can be combined. A human designer can only work with Karnaugh maps containing four to six variables. The first step toward automation of logic minimization was the introduction of the Quine-McCluskey [4,5] procedure that could be implemented on a computer. This exact minimization technique presented the notion of prime implicants and minimum cost covers that would become the cornerstone of two-level minimization. Another area of early research was in state minimization and encoding of finite-state machines (FSMs)[6-8], a task that was the bane of designers. The applications for logic synthesis lay primarily in digital computer design. Hence, IBM and Bell Laboratories played a pivotal role in the early automation of logic synthesis. The evolution from discrete logic components to programmable logic arrays (PLAs) hastened the need for efficient two-level minimization, since minimizing terms in a two-level representation reduces the area of the corresponding PLA. MINI [9] was an early two-level minimizer based on heuristics. Espresso [10] is an improvement over MINI; it uses the unate recursive paradigm (URP) as a central theme for many optimization steps.

author list (cited authors)

  • Khatri, S. P., & Shenoy, N. V.

complete list of authors

  • Khatri, SP||Shenoy, NV

Book Title

  • EDA for IC Implementation, Circuit Design, and Process Technology

publication date

  • January 2006