Capacitance Extraction With Provably Good Absorbing Boundary Conditions
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abstract
2017 IEEE. 3-D field solvers have become popular tools for parasitic capacitance extraction of full custom circuits, IPs, and packages. Traditional field solvers based on finite difference method/finite element method/floating random walk truncate the field on the outer boundary of the numerical region by applying Dirichlet or Neumann boundary conditions. However, to ensure high accuracy in the vicinity of circuit elements, a substantial gridded region between the circuit and the outer boundary is necessary in order to reduce distortion of the field caused by these truncation conditions. In this paper, we make a fundamental contribution to the application of numerical field solvers by proposing a class of absorbing boundary conditions, which when implemented, significantly reduce the distortion of the field at the numerical boundary, and consequently, throughout the numerical region. The absorbing boundary condition we propose will allow the field throughout the numerical region to behave as though there is no numerical boundary, accurately mimicking the fields in an actual circuit. As a result, the size of the numerical region can be significantly reduced, which in turn reduces the run time without sacrificing accuracy. A mathematical development of the proposed absorbing boundary condition is presented. It is shown that the error of the proposed n th order absorbing boundary is O(1/r n+2 ) , while the error of the traditional Neumann boundary is O(1/r 2 ), where r is the size of the numerical region. Experimental results for capacitance extraction with interconnects in multilayer dielectrics and silicon on insulator show the proposed methods improve the run time and accuracy of numerical solutions of Laplace's equation over previous boundary conditions for uniform or nonuniform meshes.
