Queueing network models in the design and analysis of semiconductor wafer fabs Academic Article

abstract

• We provide an introduction to the application of queueing network models to the design and analysis of semiconductor wafer fabs. We introduce the basic issues that confront the system manager and discuss a variety of queueing network based tools for addressing these issues. A representative collection of existing results in this area is also briefly surveyed.

authors

• Kumar, Panganamala

published proceedings

• IEEE Transactions on Robotics and Automation

author list (cited authors)

• Kumar, S., & Kumar, P. R.

citation count

• 78

complete list of authors

• Kumar, S||Kumar, PR

publication date

• October 2001

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Transactions on Automation Science and Engineering  Journal

keywords

• 33 Built Environment And Design
• 3303 Design
• 40 Engineering

Digital Object Identifier (DOI)

• 10.1109/70.964657

start page

• 548

end page

• 561

volume

• 17

issue

• 5

URL

• http://dx.doi.org/10.1109/70.964657