Embedding large multidimensional DSP computations in reconfigurable logic Academic Article

abstract

• This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

authors

• Alnuweiri, Hussein

published proceedings

• HIGH-SPEED COMPUTING, DIGITAL SIGNAL PROCESSING, AND FILTERING USING RECONFIGURABLE LOGIC

author list (cited authors)

• Elnaggar, A., Alnuweiri, H. M., & Ito, M. R.

citation count

• 0

complete list of authors

• Elnaggar, A||Alnuweiri, HM||Ito, MR

editor list (cited editors)

• Schewel, J., Athanas, P. M., Bove, Jr., V. M., & Watson, J.

publication date

• October 1996

publisher

• SPIE, the international society for optics and photonics  Publisher

published in

• Proceedings of SPIE  Journal

keywords

• Discrete Cosine Transform
• Fpgas
• Highly Parallel Architectures
• Reconfigurable Computing
• Recursive Algorithms

Digital Object Identifier (DOI)

• 10.1117/12.255828

start page

• 300

end page

• 307

volume

• 2914

URL

• http://dx.doi.org/10.1117/12.255828