Fault tolerant permutation mapping in multistage interconnection network
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An efficient scheme for fault tolerant mapping of permutations is designed. The proposed algorithm uses extra passes through the network, instead of additional hardware.
Journal of Systems Architecture
author list (cited authors)
Maulik, U., Bandyopadhyay, S., & Bhattacharyya, S.
complete list of authors
Maulik, U||Bandyopadhyay, S||Bhattacharyya, S