High-Performance Continuous-Time MASH Sigma-Delta ADCS for Broadband Wireless Applications Conference Paper uri icon

abstract

  • © 2017 IEEE. This paper focuses on the design and analysis of multi-stage noise-shaping (MASH) sigma-delta modulators. Fundamentals and properties of MASH modulators are discussed. A detailed methodology on analyzing continuous-time MASH (CT-MASH) modulator based on the impulse invariant transformation is also described. Two fabricated design examples are discussed: a 130 nm CMOS CT-MASH 4-0 employing a digital pseudo-MASH compensation consumes 20mW and achieves 75 dB peak SNDR over a 15 MHz bandwidth with an active area of 1.3 mm2; a 40 nm CMOS CT-MASH 2-2 architecture achieves peak SNDR of 74.4 dB within the signal bandwidth of 50.3 MHz with power consumption of 43.0 mW and active area of 0.265 mm2.

author list (cited authors)

  • Liu, Q., Edward, A., Briseno-Vidrios, C., Rashidi, N., & Silva-Martinez, J.

citation count

  • 1

publication date

  • August 2017

publisher