STAMP: A Universal Algorithmic Model for Next-Generation Multithreaded Machines and Systems Conference Paper

abstract

• We propose a generic algorithmic model called STAMP (Synchronous, Transactional, and Asynchronous Multi-Processing) as a universal performance and power complexity model for multithreaded algorithms and systems. We provide examples to illustrate how to design and analyze algorithms using STAMP and how to apply the complexity estimates to better utilize CMP(Chip MultiProcessor)-based machines within given constraints such as power. 2008 IEEE.

name of conference

• 2008 IEEE International Symposium on Parallel and Distributed Processing

authors

• Lee, Hyunyoung

published proceedings

• 2008 IEEE International Symposium on Parallel and Distributed Processing

author list (cited authors)

• Dubois, M., & Lee, H.

citation count

• 1

complete list of authors

• Dubois, Michel||Lee, Hyunyoung

publication date

• January 2008

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• Proceedings of the International Parallel and Distributed Processing Symposium, IPDPS  Journal

Digital Object Identifier (DOI)

• 10.1109/ipdps.2008.4536385

International Standard Book Number (ISBN) 13

• 9781424416943

start page

• 1

end page

• 5

URL

• http://dx.doi.org/10.1109/ipdps.2008.4536385