STAMP: A Universal Algorithmic Model for Next-Generation Multithreaded Machines and Systems Conference Paper uri icon

abstract

  • We propose a generic algorithmic model called STAMP (Synchronous, Transactional, and Asynchronous Multi-Processing) as a universal performance and power complexity model for multithreaded algorithms and systems. We provide examples to illustrate how to design and analyze algorithms using STAMP and how to apply the complexity estimates to better utilize CMP(Chip MultiProcessor)-based machines within given constraints such as power. ©2008 IEEE.

author list (cited authors)

  • Dubois, M., & Lee, H.

citation count

  • 1

publication date

  • April 2008

publisher