SMT switch: Software Mechanisms for Power Shifting Academic Article

abstract

• Simultaneous multithreading (SMT) as a processor design to achieve higher levels of system and application throughput is a well-accepted and deployed technique in most desktop and server processors. We study the power implications of varying SMT levels i.e., thread counts per core for various multi-threaded applications on a real SMT multicore platform, and introduce a novel software mechanism of changing SMT level of a core to tune platform power. Power-shifting policies by varying per core SMT levels for performance benefits within a power cap are introduced. Projected power savings (of 15%) for a streaming parallel benchmark can be attained using SMT-level power shifting mechanisms. 2002-2011 IEEE.

authors

• Da Silva, Dilma

published proceedings

• IEEE COMPUTER ARCHITECTURE LETTERS

author list (cited authors)

• Tembey, P., Vega, A., Buyuktosunoglu, A., Da Silva, D., & Bose, P.

citation count

• 2

complete list of authors

• Tembey, Priyanka||Vega, Augusto||Buyuktosunoglu, Alper||Da Silva, Dilma||Bose, Pradip

publication date

• July 2013

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Computer Architecture Letters  Journal

keywords

• Multicore Platforms
• Operating Systems
• Power Shifting
• Smt

Digital Object Identifier (DOI)

• 10.1109/L-CA.2012.26

start page

• 67

end page

• 70

volume

• 12

issue

• 2

URL

• http://dx.doi.org/10.1109/l-ca.2012.26