Integrated Multilayered On-Chip Inductors for Compact CMOS RFICs and Their Use in a Miniature Distributed Low-Noise-Amplifier Design for Ultra-Wideband Applications

A novel multilayered vertically integrated inductor structure is developed for miniature CMOS RF integrated circuits, and its properties are investigated. The effect of mutual inductance both within and between adjacent multilayer inductors is also studied. A distributed low noise amplifier is designed by incorporating this novel inductor structure in a standard JAZZ 0.18-m RF/mixed signal CMOS process, demonstrating the significance of the proposed multilayered inductors in CMOS circuit miniaturization. The three-stage distributed amplifier occupies just 288 291 m or 0.08 mm2 of die area, making it the smallest distributed amplifier reported to date. The circuit exhibits a relatively flat gain of 6 dB from 3.1 to 10.6 GHz with less than 0.5-dB ripple, with excellent input and output match of less than -12 and -25 dB, respectively. The noise figure is less than 5 dB to 14 GHz with only 2.7 dB across 8-10 GHz, while the power consumption is approximately 22 mW. 2008 IEEE.

Integrated Multilayered On-Chip Inductors for Compact CMOS RFICs and Their Use in a Miniature Distributed Low-Noise-Amplifier Design for Ultra-Wideband Applications Academic Article