A Ultra-Wideband Fully Integrated CMOS Sampling Receiver Frontend
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abstract
A new ultra-wideband 0.18-m CMOS sampling receiver frontend was developed. It includes a low-noise amplifier (LNA) and a sampler and achieves high gain, fast sampling, low noise figure, low power consumption, and enhanced RF-power efficiency. The LNA and sample-and-hold capacitor are switched using two synchronized strobes generated on-chip. Measured results show performance of 9 to 12 dB voltage conversion gain, 16 to 25 dB noise figure, and power consumption of only 21.6 mW (with buffer) and 11.7 mW (without buffer) across DC to 3.5 GHz with 100-MHz sampling frequency. 2010 IEEE.
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2010 IEEE Antennas and Propagation Society International Symposium