On the design of CMOS phase shifters with small insertion‐loss variation for phased arrays and its validation at 24 GHz
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© 2016 Wiley Periodicals, Inc. Body-floating technique applied to n-type metal-oxide-semiconductor transistors and transistor-size optimization is studied for minimizing the insertion-loss variation in phase shifters. A CMOS radio frequency integrated circuit 4-bit digital phase shifter with low insertion-loss variation across different phase states is designed at 24 GHz using a 0.18-μm SiGe BiCMOS technology to verify the concepts. The phase shifter shows a measured insertion-loss variation of 13 ± 2.5 dB, root mean square (RMS) amplitude error of 1.7 dB, and input 1-dB power compression (P1dB) higher than 12.5 dBm across different phase states at 24 GHz. The measured input/output return loss better than 10 dB and RMS phase error of 2.4–26° over 21 to 27 GHz are obtained. © 2016 Wiley Periodicals, Inc. Microwave Opt Technol Lett 58:2203–2210, 2016.
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