Diagonal Low-Density Parity-Check code for simplified routing in decoder Conference Paper

abstract

• We propose a novel Low-Density Parity-Check (LDPC) decoder design methodology by introducing a special code named Diagonal-LDPC (DLDPC) code. An LPDC code, defined by a parity check matrix H, can be represented by a bipartite graph. To address the complex routing problem in the LDPC decoder implementation, a partitioned bipartite-graph code is proposed and generalized to a DLDPC code having constraint of positioning 1's near the diagonal area. This structured code simplifies the routing problem [1] [2] [3] and enables cell-based highly regular fully-parallel decoder design without compromising the code performance. 2005 IEEE.

name of conference

• IEEE Workshop on Signal Processing Systems Design and Implementation, 2005.

authors

• Choi, Gwan

published proceedings

• 2005 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS - DESIGN AND IMPLEMENTATION (SIPS)

author list (cited authors)

• Kim, E., & Choi, G. S.

citation count

• 6

complete list of authors

• Kim, E||Choi, GS

publication date

• January 2005

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation  Journal

Digital Object Identifier (DOI)

• 10.1109/sips.2005.1579966

International Standard Book Number (ISBN) 10

• 0-7803-9333-3

International Standard Book Number (ISBN) 13

• 9780780393349

start page

• 756

end page

• 761

volume

• 2005

URL

• http://dx.doi.org/10.1109/sips.2005.1579966