Fault behavior dictionary for simulation of device-level transients
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This paper presents a methodology for the simulation of massive number of device-level transient faults. Fault injection locations and the gates around those locations are extracted and evaluated with SPICE. The extracted sub-circuits are exercised exhaustively while fault-injections are performed. Faulty behavior at the outputs of each sub-circuit is recorded in a dictionary, along with the associated input vector, fault-injection time, and location. The recorded logical errors are injected concurrently at run-time on the target design. A concurrent transient simulator is developed to allow simultaneous evaluation of a massive number of fault-injections, in a single simulation pass. The methodology is illustrated by a case study of MC68000 microprocessor.
name of conference
1993 International Conference on Computer Aided Design (ICCAD)
Proceedings of 1993 International Conference on Computer Aided Design (ICCAD)
author list (cited authors)
Choi, G. S., Iyer, R. K., & Saab, D. G.
complete list of authors
Choi, GS||Iyer, RK||Saab, DG