Data Processing Logic for Stacked Wafer-Scale CMOS Radiation Sensor Network
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abstract
This paper presents a data processing and control logic design for a new radiation detection sensor system that can process data at or above peta-bits-per-second level. We propose a novel data compression method and operation strategy for a radiation sensor array including low power and network-on-wafer solutions. The design goal is to achieve a subtle data compression before the information is ferried to the network, minimizing the loss of information. The result is a radiation detection system that can operate at scan-rate of billion frames per second. The implementation result of the data processing system shows that the intended clock rate is achieved within the power target of less than 200mW. 2013 IEEE.
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2013 IEEE Nuclear Science Symposium and Medical Imaging Conference (2013 NSS/MIC)
