Overlapped List Successive Cancellation Approach for Hardware Efficient Polar Code Decoder
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abstract
2016 IEEE. This paper presents an efficient hardware design approach for list successive cancellation (LSC) decoding of polar codes. By applying path-overlapping scheme, for LSC with list size l (l > 1), the l instances of successive cancellation (SC) decoder can be cut down to only one. This results in a dramatic reduction of the hardware complexity without any decoding performance loss. We also develop novel approaches to reduce the latency associated with the pipeline scheme. Simulation results show that with proposed design approach the hardware efficiency is increased significantly over the recently proposed LSC decoders.
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2016 IEEE International Symposium on Circuits and Systems (ISCAS)