A 92-MHz 13-Bit If Digitizer Using Optimized SC Integrators in 0.35-$mu{hbox{M}}$ CMOS Technology

A feedforward compensation scheme with no Miller capacitors is proposed to overcome the bandwidth limitations of traditional Miller compensation schemes. The technique has been used in the design of an operational transconductance amplifier (OTA) with a dc gain of 80 dB, gain bandwidth of 1.4 GHz, phase margin of 62, and 2 ns settling time for 2-pF load capacitor in a standard 0.35-m CMOS technology. The OTA's current consumption is 4.6 mA. The OTA is used in the design of a fourth-order switched-capacitor bandpass modulator with a clock frequency of 92 MHz. It achieves a peak signal-to-noise ratio of 80 and 54 dB for 270-kHz (GSM) and 3.84-MHz (CDMA) bandwidths, respectively and consumes 19 mA of current from a 1.25-V supply. 2006, IEEE. All rights reserved.

A 92-MHz 13-Bit If Digitizer Using Optimized SC Integrators in 0.35-$mu{hbox{M}}$ CMOS Technology Academic Article