Design Techniques for External Capacitor-Less LDOs with High PSR over Wide Frequency Range Conference Paper

abstract

• 2014 IEEE. The paths for power supply noise leakage in low drop-out (LDO) voltage regulators are analyzed, and techniques are discussed to minimize their effects on the output voltage. An internally compensated high power supply rejection (PSR) LDO voltage regulator with adaptive supply noise compensation scheme is presented. Its regulated output voltage is 1.6 V to provide 0-50 mA of current with a power supply of 1.8 V. The measured PSR is better than -50 dB up to 4 MHz. The fabricated LDO occupies 0.25 mm2 in a 0.18 m CMOS technology. It consumes 80 A of ground current. The load regulation for a 50 mA step with 100 ns rise/fall times is 200 mV.

name of conference

• 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

authors

• Silva-Martinez, Jose

published proceedings

• 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS)

author list (cited authors)

• Park, C., Silva-Martinez, J., & Onabajo, M.

citation count

• 4

complete list of authors

• Park, Chang-Joan||Silva-Martinez, Jose||Onabajo, Marvin

publication date

• August 2014

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• The ... Midwest Symposium on Circuits and Systems conference proceedings : MWSCAS. Midwest Symposium on Circuits and Systems  Journal

Digital Object Identifier (DOI)

• 10.1109/mwscas.2014.6908422

International Standard Book Number (ISBN) 13

• 9781479941346

start page

• 342

end page

• 345

URL

• http://dx.doi.org/10.1109/mwscas.2014.6908422