Power Efficiency Comparisons of Interchip Optical Interconnect Architectures Academic Article uri icon


  • High-bandwidth interchip optical interconnect architectures have the potential to address increasing inputoutput bandwidth demands. This brief compares several optical interconnect architectures on the basis of power efficiency in 90- and 45-nm CMOS technologies. Under consideration are a near-term architecture consisting of discrete vertical-cavity surface-emitting lasers (VCSELs) with p-i-n photodetectors (PDs) and three long-term integrated photonic architectures that use waveguide metalsemiconductormetal PDs and either electroabsorption modulator (EAM), ring resonator modulator (RRM), or MachZehnder modulator (MZM) sources. An optimal current density methodology with normalized transistor parameters extracted from circuit simulations is applied to jointly optimize driver and receiver circuitry to minimize the total link power dissipation. The analysis results show that the VCSEL-based link is limited by VCSEL bandwidth and maximum power levels, rather than circuit bandwidth, and achieves a maximum of 24 Gb/s in both the 90- and 45-nm nodes. The EAM and the RRM are both attractive integrated photonic technologies capable of scaling data rates past 30 Gb/s at power efficiency levels near 0.5 mW/Gb/s in the 45-nm node and are primarily limited by coupling and device insertion losses. While the MZM offers robust operation due to its wide optical bandwidth, significant improvements in power efficiency must be achieved to become applicable for high-density applications. 2006 IEEE.

published proceedings

  • IEEE Transactions on Circuits & Systems II Express Briefs

altmetric score

  • 3

author list (cited authors)

  • Palaniappan, A., & Palermo, S.

citation count

  • 11

complete list of authors

  • Palaniappan, Arun||Palermo, Samuel

publication date

  • January 2010