Burst Mode Packet Receiver using a Second Order DLL
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abstract
This paper describes a CDR that can be used to receive optically switched packets. Rather than using fast phase acquisition to lock onto each packet, it uses a second order delay locked loop to acquire both the frequency and phase of each source to predict future bit transitions. A 0.25m CMOS prototype can track frequency offsets of 100ppm to better than 0.1ppm and can retain lock on 10Kbit 3.125Gbps packets that occur once every 2.4Mbits.
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2004 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.04CH37525)