A 75 MHz BW 68dB DR CT-EA Modulator with Single Amplifier Biquad Filter and a Broadband Low-power Common-gate Summing Technique Conference Paper uri icon

abstract

  • 2015 JSAP. A wide bandwidth, power efficient continuous-time modulator (CTM) is presented. The modulator introduces a 3rd order filter implemented with a lossless integrator and a multiple-feedback (MFB) single-amplifier biquad (SAB) with embedded loop stability compensation. An active summing block is implemented with a common-gate amplifier followed by a transimpedance amplifier (TIA) that achieves optimum bandwidth (BW) vs power consumption tradeoff, making it suitable for over GHz operation. Fabricated in 40 nm CMOS, and clocked at 3.2 GHz, the CTM achieves a signal-to-noise and distortion ratio (SNDR) of 64.9 dB over 75 MHz BW while consuming 22.8 mW of power. The obtained Walden's Figure of Merit (FoM) is 106 fJ/conv-step.

name of conference

  • 2015 Symposium on VLSI Circuits (VLSI Circuits)

published proceedings

  • 2015 Symposium on VLSI Circuits (VLSI Circuits)

author list (cited authors)

  • Briseno-Vidrios, C., Edward, A., Shafik, A., Palermo, S., & Silva-Martinez, J.

citation count

  • 8

complete list of authors

  • Briseno-Vidrios, Carlos||Edward, Alexander||Shafik, Ayman||Palermo, Samuel||Silva-Martinez, Jose

publication date

  • January 2015