A 75-MHz Continuous-Time Sigma–Delta Modulator Employing a Broadband Low-Power Highly Efficient Common-Gate Summing Stage Academic Article uri icon

abstract

  • © 2016 IEEE. A wide-bandwidth (BW) power-efficient continuous-time Σ Δ modulator (CT Σ ΔM) is presented. The modulator introduces a third-order filter implemented with a lossless integrator and a multiple-feedback single-amplifier biquadratic filter with embedded loop stability compensation. An active summing block is implemented by employing a common-gate current buffer followed by a transimpedance amplifier. This combination relaxes the specification requirements of the operational amplifier by making its required BW independent of the closed-loop gain. The proposed technique achieves optimum BW with reduced power consumption, making it functional for over gigahertz operation. Fabricated in a standard 40-nm CMOS technology, and clocked at 3.2 GHz, the CT Σ ΔM achieves a signal-to-noise-and-distortion ratio of 65.5 dB over 75-MHz BWwhile consuming 22.8 mW of power. The obtained Walden's figure of merits is 98 fJ/conv-step.

author list (cited authors)

  • Briseno-Vidrios, C., Edward, A., Shafik, A., Palermo, S., & Silva-Martinez, J.

citation count

  • 14

publication date

  • December 2016