Generalized High-Level Synthesis of Wavelet-Based Digital Systems via Nonlinear I/O Data Space Transformations
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In this paper, we systematically present the high-level architectural synthesis for general wavelet-based algorithms via a model of I/O data space and the nonlinear transformations of the I/O data space. The parallel architectures synthesized in this paper are based on the computation model of distributed memory and distributed control. Several architectural designs have been proposed for the Discrete Wavelet Transform (DWT) [4]-[11]. None of these architectural designs for computing the DWT follows a systematic data dependence and localization analysis of general wavelet-based algorithms, and thus they only serve as particular designs and cannot be extended to other complicated wavelet-based algorithms such as MultiWavelet Transform (MWT)[1,13,14], Wavelet Packet Transform (WPT)[2,15] or Spacial-Frequential Quantization (SFQ) [12]. Using the WPT as a representative example of complex wavelet-based algortihms, this paper fully describes the theory and methodology used in synthesizing parallel architectures for general wavelet-based algorithms.