Multi-valued logic synthesis Conference Paper uri icon

abstract

  • We survey some of the methods used for manipulating, representing, and optimizing multi-valued logic with the view of both building a better understanding of the more specialized binary-valued logic, as well as motivating research towards a true multi-valued multi-level optimization package.

published proceedings

  • Proceedings of the IEEE International Conference on VLSI Design

author list (cited authors)

  • Brayton, R. K., & Khatri, S. P.

complete list of authors

  • Brayton, RK||Khatri, SP

publication date

  • January 1999