Reducing the interfacial formation of SiOx in HFO 2 MOS structures: A study in pre-deposition cleaning, surface oxidation and post-deposition annealing
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As the requirement for the equivalent oxide thickness (EOT) of a gate dielectric in advanced ULSI devices is projected to smaller dimensions, the importance of the presence of an interfacial layer also becomes more significant. Our study to the formation of an interfacial layer has proceeded in two directions: (1) understanding the mechanism of interfacial layer formation and (2) controlling its formation. With electron diffraction tools and ellipsometry, we investigated cleaning methods to achieve a higher degree of hydrogen surface termination and a more atomically smooth surface, which results in less native oxide re-growth compared to conventional RCA-based cleanings. With regards to the mechanism of interfacial layer formation during the deposition process, XPS studies indicates an interfacial SiO x layer is generated in the co-presence of metal and oxygen in a room temperature electron-beam deposition. Extensive electrical studies of hafnium dioxide have been performed. The high-K HfO 2 material is deposited by (a) reactive electron-beam evaporation or (b) ultra-high vacuum deposition from Hf and O atomic sources. A maximum dielectric constant of 26 has been achieved for long-term oxidation.
