A new technique to reject DC-link voltage ripple for inverters operating on programmed PWM waveforms Academic Article

abstract

• A proposal for rejecting DC-link voltage ripple in inverters operating on programmed PWM waveforms is examined in detail. It is demonstrated how continuous elimination of harmonics is achieved at the inverter output while simultaneously rejecting the DC-link voltage ripple. Thus, with the proposed technique, high-quality voltage is guaranteed at the inverter output terminals even with a substantial low-frequency voltage ripple on the DC-link. A thorough modeling of this technique along with the tradeoffs involved in acquiring the immunity to DC-link ripple is illustrated in detail. Potential applications of the technique are in fixed and variable frequency inverters for power supplies and AC motor drives that experience voltage ripple in the DC link such as when fed from a weak AC system that is frequently unbalanced. A design procedure along with the digital implementation of the proposed technique is described. Selected results were verified experimentally on a laboratory inverter.

authors

• Enjeti, Prasad

published proceedings

• IEEE Transactions on Power Electronics

altmetric score

• 3

author list (cited authors)

• Enjeti, P. N., & Shireen, W.

citation count

• 105

complete list of authors

• Enjeti, PN||Shireen, W

publication date

• January 1992

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• IEEE TRANSACTIONS ON POWER ELECTRONICS  Journal

Digital Object Identifier (DOI)

• 10.1109/63.124589

start page

• 171

end page

• 180

volume

• 7

issue

• 1

URL

• http://dx.doi.org/10.1109/63.124589