A Fault-Tolerant T-Type Three-Level Inverter System Conference Paper uri icon


  • Field experiences have demonstrated that semiconductor devices are vulnerable to failures (open-& short-circuit). In many critical applications, such failures are unacceptable and high system reliability is required. In this paper, a topology modification for the T-type 3-level inverter is explored to achieve the fault-tolerant operation and enhance the system reliability in the case of device open-circuit or short-circuit failures. With the proposed topology modification (via fewer additional switches), the device failure ride-through performance can be dynamically achieved without degradation of output capacity. Furthermore, the transition principles from normal operations to post-fault operations are detailed, and the reliability enhancement is calculated. The simulation results are included to verify the validity of the modified topology. © 2014 IEEE.

altmetric score

  • 6

author list (cited authors)

  • Zhang, W., Liu, G., Xu, D., Hawke, J., Garg, P., & Enjeti, P.

citation count

  • 11

publication date

  • March 2014