A 10-67-GHz CMOS Step Attenuator with Improved Flatness and Large Attenuation Range Conference Paper uri icon

abstract

  • A four-bit CMOS step attenuator is designed using a new design method to achieve improved flatness and large attenuation range from 10-67 GHz. The design method is based on the frequency-response characteristics of the conventional Pi-, T-, and distributed attenuators. Over 10-67 GHz, the measured results exhibit attenuation flatness of 6.8 dB and attenuation range of 32-42 dB. 2013 IEEE.

name of conference

  • 2013 IEEE 13th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems

published proceedings

  • 2013 IEEE 13TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF)

author list (cited authors)

  • Bae, J., Lee, J., & Cam, N.

citation count

  • 4

complete list of authors

  • Bae, Juseok||Lee, Jaeyoung||Cam, Nguyen

publication date

  • January 2013