Dual-Injection-Locked 1/2 Divider with Optimized VCO Loaded Q and Current Conference Paper

abstract

• A new dual-injection locked frequency divider (dual-ILFD) with wide locking range and low-power consumption is proposed and developed together with a divide-by-2 current mode logic (CML) divider. CML divider is connected at the output of dual-ILFD for achieving constant output amplitude. The chip was fabricated using a 0.18-m BiCMOS process. The dual-ILFD enhances the locking range with low-power consumption through optimized load quality factor (Q L) and output current amplitude (iOSC) simultaneously, achieving a locking range of 692 MHz between 7.512 and 8.204 GHz, which is almost 10 times larger than a single-injection counterpart. The core of dual-ILFD consumes 2.93 mA with 1.5 V supply. 2013 IEEE.

name of conference

• 2013 National Conference on Communications (NCC)

authors

• Nguyen, Cam Van

published proceedings

• 2013 NATIONAL CONFERENCE ON COMMUNICATIONS (NCC)

author list (cited authors)

• Lee, S., Jang, S., & Cam, N.

citation count

• 2

complete list of authors

• Lee, Sanghun||Jang, Sunhwan||Cam, Nguyen

publication date

• February 2013

publisher

• Institute of Electrical and Electronics Engineers (IEEE)  Publisher

published in

• 2013 National Conference on Communications, NCC 2013  Journal

keywords

• Dual-ilfd
• Injection-locked Frequency Divider (ilfd)
• Phase-locked Loop (pll)
• Synthesizer

Digital Object Identifier (DOI)

• 10.1109/ncc.2013.6487921

International Standard Book Number (ISBN) 13

• 978-1-4673-5950-4

start page

• 1

end page

• 2

URL

• http%3A%2F%2Fdx.doi.org%2F10.1109%2Fncc.2013.6487921